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| HM624257A Series 262,144-word x 4-bit High Speed CMOS Static RAM The Hitachi HM624257A is a high speed 1 M Static RAM organized as 262,144-word x 4-bit. It realizes high speed access time (25/35 ns) and low power consumption, employing the advanced CMOS process technology and high speed circuit designing technology. It is most advantageous for the field where high speed and high density memory is required, such as the cache memory for main frame or 32-bit MPU. The HM624257A, packaged in a 400-mil plastic SOJ is available for high density mounting. Pin Arrangement NC A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 I4 I3 CS VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top view) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A17 A16 A15 A14 A13 A12 A11 NC I1 I2 O1 O2 O3 O4 WE Features * Single 5 V supply and high density 32-pin package (SOJ) * High speed Access time: 25/35 ns (max) * Low power dissipation Active mode: 350 mW (typ) Standby mode: 100 W (typ) * Completely static memory No clock or timing strobe required * Equal access and cycle time * Directly TTL compatible All inputs and outputs Pin Description Pin name Function --------------------------------------------- A0 - A17 Address --------------------------------------------- I1 - I4 Data input --------------------------------------------- O1 - O4 Data output --------------------------------------------- CS Chip select --------------------------------------------- WE Write enable --------------------------------------------- VCC Power supply --------------------------------------------- VSS Ground --------------------------------------------- Ordering Information Type No. Access time Package --------------------------------------------- HM624257AJP-25 25 ns 400-mil HM624257AJP-35 35 ns 32-pin -------------------------------- plastic SOJ HM624257ALJP-25 25 ns (CP-32D) HM624257ALJP-35 35 ns --------------------------------------------- 1 HM624257A Series Block Diagram HM624257A Series A2 A3 A4 A5 A6 A7 A8 A9 A10 I1 I2 I3 I4 Row decoder Memory array 512 x 2048 VCC VSS Input data control Column I/O Column decoder O1 O2 O3 O4 A0 A1 A11 A12 A13 A14 A15 A16 A17 CS WE Absolute Maximum Ratings Parameter Symbol Value Unit ----------------------------------------------------------------------------------------------- Voltage on any pin relative to VSS Vin -0.5*1 to +7.0 V ----------------------------------------------------------------------------------------------- Power dissipation PT 1.0 W ----------------------------------------------------------------------------------------------- Operating temperature range Topr 0 to +70 C ----------------------------------------------------------------------------------------------- Storage temperature range Tstg -55 to +125 C ----------------------------------------------------------------------------------------------- Storage temperature range under bias Tbias -10 to +85 C ----------------------------------------------------------------------------------------------- Note: 1. Vin min = -2.0 V for pulse width 10 ns. Function Table CS WE Mode VCC current Dout pin Ref. cycle ----------------------------------------------------------------------------------------------- H X Not selected ISB, ISB1 High-Z -- ----------------------------------------------------------------------------------------------- L H Read ICC Dout Read cycle (1) - (2) ----------------------------------------------------------------------------------------------- L L Write ICC High-Z Write cycle (1) - (2) ----------------------------------------------------------------------------------------------- Note: X : H or L 2 HM624257A Series Recommended DC Operating Conditions (Ta = 0 to +70C) HM624257A Series Parameter Symbol Min Typ Max Unit ----------------------------------------------------------------------------------------------- Supply voltage VCC 4.5 5.0 5.5 V --------------------------------------------------------------- VSS 0 0 0 V ----------------------------------------------------------------------------------------------- Input high (logic 1) voltage VIH 2.2 -- 6.0 V ----------------------------------------------------------------------------------------------- Input low (logic 0) voltage VIL -0.5*1 -- 0.8 V ----------------------------------------------------------------------------------------------- Note: 1. VIL min = -2.0 V for pulse width 10 ns. DC Characteristics (Ta = 0 to +70C, VCC = 5 V 10%, VSS = 0 V) HM624257A-25/35 ------------------ Parameter Symbol Min Typ*1 Max Unit Test conditions ----------------------------------------------------------------------------------------------- Input leakage current |ILI| -- -- 2.0 A VCC = max, Vin = VSS to VCC ----------------------------------------------------------------------------------------------- Output leakage current |ILO| -- -- 2.0 A CS = VIH, VI/O = VSS to VCC ----------------------------------------------------------------------------------------------- Operating power supply current ICC -- -- 120 mA CS = VIL, II/O = 0 mA, min cycle ----------------------------------------------------------------------------------------------- Standby power supply current ISB -- -- 40 mA CS = VIH, min cycle ----------------------------------------------------------------------------------------------- Standby power supply current (1) ISB1 -- 0.02 2.0 mA CS VCC - 0.2 V, 0 V Vin ---------------------------------- 0.2 V or Vin VCC - 0.2V ISB1*2 -- -- 100*2 A ----------------------------------------------------------------------------------------------- Output low voltage VOL -- -- 0.4 V IOL = 8 mA ----------------------------------------------------------------------------------------------- Output high voltage VOH 2.4 -- -- V IOH = -4 mA ----------------------------------------------------------------------------------------------- Notes: 1. Typical values are at VCC = 5.0 V, Ta = +25C and not guaranteed. 2. LJP version Capacitance (Ta = 25C, f = 1 MHz)*1 Parameter Symbol Min Max Unit Test conditions ----------------------------------------------------------------------------------------------- Input capacitance Cin -- 5 pF Vin = 0 V ----------------------------------------------------------------------------------------------- Output capacitance Cont -- 8 pF Vout = 0 V ----------------------------------------------------------------------------------------------- Note: 1. This parameter is sampled and not 100% tested. 3 HM624257A Series Test Conditions * Input pulse levels: 0 V to 3.0 V * Input rise and fall times: 4 ns * Input timing reference levels: 1.5 V +5V 480 Dout 255 30 pF *1 Dout 255 HM624257A Series AC Characteristics (Ta = 0 to +70C, VCC = 5 V 10%, unless otherwise noted.) * Output timing reference levels: 1.5 V * Output load: See figures +5V 480 5 pF *1 Output load (A) Note: 1. Including scope and jig Output load (B) (For tHZ , tLZ, tWZ, and tOW) Read Cycle HM624257A-25 HM624257A-35 ----------------- ----------------- Parameter Symbol Min Max Min Max Unit ----------------------------------------------------------------------------------------------- Read cycle time tRC 25 -- 35 -- ns ----------------------------------------------------------------------------------------------- Address access time tAA -- 25 -- 35 ns ----------------------------------------------------------------------------------------------- Chip select access time tACS -- 25 -- 35 ns ----------------------------------------------------------------------------------------------- Output hold from address change tOH 5 -- 5 -- ns ----------------------------------------------------------------------------------------------- Chip selection to output in low-Z tLZ*1 5 -- 5 -- ns ----------------------------------------------------------------------------------------------- Chip deselection to output in high-Z tHZ*1 0 12 0 15 ns ----------------------------------------------------------------------------------------------- Chip selection to power up time tPU 0 -- 0 -- ns ----------------------------------------------------------------------------------------------- Chip deselection to power down time tPD -- 15 -- 25 ns ----------------------------------------------------------------------------------------------- Notes: 1. Transition is measured 200 mV from steady state voltage with Load (B). This parameter is sampled and not 100% tested. 4 HM624257A Series Read Timing Waveform (1) *1, *2 t RC Address t AA t OH Dout HM624257A Series t OH Valid Data Read Timing Waveform (2) *1, *3 t RC CS t ACS t LZ Dout I CC I SB High Impedance t PU 50 % t PD 50 % High Impedance t HZ VCC supply current Notes: 1. WE is high for read cycle. 2. Device is continuously selected, CS = VIL. 3. Address valid prior to or coincident with CS transition Low. 5 HM624257A Series Write Cycle HM624257A Series HM624257A-25 HM624257A-35 ----------------- ----------------- Parameter Symbol Min Max Min Max Unit ----------------------------------------------------------------------------------------------- Write cycle time tWC 25 -- 35 -- ns ----------------------------------------------------------------------------------------------- Chip selection to end of write tCW 17 -- 25 -- ns ----------------------------------------------------------------------------------------------- Address valid to end of write tAW 20 -- 30 -- ns ----------------------------------------------------------------------------------------------- Address setup time tAS 0 -- 0 -- ns ----------------------------------------------------------------------------------------------- Write pulse width tWP 17 -- 25 -- ns ----------------------------------------------------------------------------------------------- Write recovery time tWR 0 -- 0 -- ns ----------------------------------------------------------------------------------------------- Data valid to end of write tDW 15 -- 20 -- ns ----------------------------------------------------------------------------------------------- Data hold time tDH 0 -- 0 -- ns ----------------------------------------------------------------------------------------------- Write enabled to output in high-Z tWZ*1 0 15 0 15 ns ----------------------------------------------------------------------------------------------- Output active from end of write tOW*1 0 -- 0 -- ns ----------------------------------------------------------------------------------------------- Note: 1. Transition is measured 200 mV from steady state voltage with Load (B). This parameter is sampled and not 100% tested. Write Timing Waveform (1) (WE Controlled) t WC Address t CW CS t AW WE t AS t WP *1 t WR *2 t DW Din t WZ Dout Valid Data t DH t OW High Impedance t OH *4 6 HM624257A Series Write Timing Waveform (2) (CS Controlled) HM624257A Series t WC Address t AW t AS CS t WP *1 WE t DW Din *3 t CW t WR *2 t DH Valid Data High Impedance Dout Notes: 1. A write occurs during the overlap of a low CS and a low WE. 2. tWR is measured from the earlier of CS or WE going high to the end of write cycle. 3. If the CS low transition occurs simultaneously with the WE low transition or after the WE transition, the output buffers remain in a high impedance state. 4. Dout is the same phase of write data of this write cycle, if tWR is long enough. 7 HM624257A Series Low VCC Data Retention Characteristics (Ta = 0 to +70C) This characteristics is guaranteed only for L-version. HM624257A Series Parameter Symbol Min Typ Max Unit Test conditions ----------------------------------------------------------------------------------------------- VCC for data retention VDR 2.0 -- -- V CS VCC - 0.2 V, -------------------------------------------------------------------------- Vin VCC - 0.2 V or Data retention current ICCDR -- 2 50*1 A 0 V Vin 0.2 V -------------------------------------------------------------------------- Chip deselect to data retention time tCDR 0 -- -- ns -------------------------------------------------------------------------- Operation recovery time tR 5 -- -- ms ----------------------------------------------------------------------------------------------- Note: 1. VCC = 3.0 V Low VCC Data Retention Timing Waveform Data retention mode VCC 4.5 V 2.2 V VDR CS CS 0V VCC - 0.2 V t CDR tR Ta = 25C 1.2 High Level Input Voltage V IH (Normalized) 1.3 Low Level Input Voltage VIL (Normalized) 1.3 Ta = 25C 1.2 1.1 1.0 0.9 0.8 0.7 4.5 1.1 1.0 0.9 0.8 0.7 4.5 4.75 5.0 5.25 5.5 4.75 5.0 5.25 5.5 Supply Voltage VCC (V) Supply Voltage VCC (V) Low Level Input Voltage vs. Supply Voltage High Level Input Voltage vs. Supply Voltage 8 HM624257A Series 10 -5 HM624257A Series 1.4 Standby Current I SBI (Normalized) VCC = 3 V CS = 2.8 V 1.2 Standby Current I SBI (A) 10 -6 1.0 0.8 0.6 Ta = 25C CS = VCC - 0.2 V 0.4 0.2 10 -7 10 -8 0 20 40 60 80 2 3 4 5 6 Ambient Temperature Ta (C) Supply Voltage VCC (V) Standby Current vs. Ambient Temperature Standby Current vs. Supply Voltage 1.6 Ta = 25C Supply Current I CC (Normalized) Supply Current I CC (Normalized) 1.4 1.2 1.0 0.8 0.6 0.4 4.5 1.6 V CC = 5.0 V 1.4 1.2 1.0 0.8 0.6 0.4 4.75 5.0 5.25 5.5 0 20 40 60 80 Supply Voltage V CC (V) Ambient Temperature Ta (C) Supply Current vs. Supply Voltage Supply Current vs. Ambient Temperature 9 HM624257A Series 1.3 Access Time t AA, t ACS (Normalized) 1.2 Access Time t AA, t ACS (Normalized) Ta = 25C 1.8 1.6 1.4 1.2 1.0 HM624257A Series 1.1 1.0 0.9 0.8 0.7 4.5 0.8 0.6 4.75 5.0 5.25 5.5 0 50 100 150 200 Supply Voltage VCC (V) Load Capacitance C L (pF) Access Time vs. Supply Voltage Access Time vs. Load Capacitance 1.3 Access Time t AA, t ACS (Normalized) VCC = 5.0 V Supply Current I CC (Normalized) 1.4 1.2 200 100 66 50 40 T (ns) 33 1.2 1.1 1.0 0.9 0.8 0.7 0 20 40 60 80 Ambient Temperature Ta (C) 1.0 0.8 0.6 0.4 0.2 0 5 10 15 20 25 30 Frequency f (MHz) Access Time vs. Ambient Temperature Supply Current vs. Frequency 10 |
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